Features - 1.0 English

ADC DAC Interface LogiCORE IP Product Guide (PG388)

Document ID
PG388
Release Date
2022-05-16
Version
1.0 English
  • Serial to parallel conversion of RX data.
  • Parallel to serial conversion of TX data.
  • Calibration of RX data for maximizing eye opening.
  • IOs can be both single-ended and differential.
  • Serial to parallel ratios of 1:12, 1:14, and 1:16 are supported.
  • All RX lanes are calibrated using a single clock.
  • The number of RX lanes and TX lanes can span across multiple banks. The number of banks in the IP is limited to three.