PHY - 1.0 English

ADC DAC Interface LogiCORE IP Product Guide (PG388)

Document ID
PG388
Release Date
2022-05-16
Version
1.0 English

The PHY is considered the low-level physical interface to ADCs or DACs. It contains calibration logic for ensuring reliable operation of the physical interface itself. The PHY contains the following features:

  • Clock and reset generation logic.
  • RX and TX datapaths.

The PHY is included in the complete ADC DAC Interface IP core.