Clocking - 1.1 English

Video Warp Processor LogiCORE IP Product Guide (PG396)

Document ID
PG396
Release Date
2022-05-11
Version
1.1 English

The Warp Initializer and Warp Filter cores have only one clock domain. All the interfaces, (the AXI4 interface), and the memory mapped AXI4 interface use the ap_clk pin as their clock source.