Register Space - 1.1 English

DPUCVDX8H for Convolutional Neural Networks LogiCORE IP Product Guide (PG403)

Document ID
PG403
Release Date
2022-06-24
Version
1.1 English

The DPUCVDX8H IP implements control specific register (CSR) in programmable logic. The following tables show the DPU IP registers. These registers are accessible through the DPU_CSR_S_AXI interface.