The Utility Flip-Flop core is used to avoid timing errors between two parts of the circuits, when used as an intermediary between them. It has different configurations for various situations, the configurations include:
- FDRE (D-Flip-Flip with clock enable and synchronous reset)
- FDCE (D-Flip-Flip with clock enable and asynchronous clear)
- FDSE (D-Flip-Flip with clock enable and asynchronous set)
- FDPE (D-Flip-Flip with clock enable and synchronous preset)
- LDCE (Transparent latch with clock enable and asynchronous clear)
- LDPE (Transparent latch with clock enable and asynchronous preset)