DMA Memory Limitation - 1.0 English

H.264/H.265 Video Decode Unit Solutions LogiCORE IP Product Guide (PG414)

Document ID
PG414
Release Date
2023-05-16
Version
1.0 English

Decoder uses the DMA memory for decoding the streams. By default, CMA memory region is used for DMA buffer allocation. But this can vary for BSP and is limited. So while decoding multiple streams with multiple decoders having high resolutions, the system may run out of CMA memory.

To overcome above DMA memory limitation, reserved memory can be used. For example, let’s say petalinux hw design has two VDU instances (/dev/allegroDecodeIP0 & /dev/allegroDecodeIP1). One instance can use CMA memory. By modifying the design, can be able to assign specific reserved memory region in the DDR to the second VDU instance.

The below example shows reserving memory using ddr controllers with separate 4GB aligned base address for allegroDecodeIP1. Here allegroDecodeIP0 will use normal CMA memory region. So with this changes both VDU instances can decoder 4k streams separately.

reserved-memory {
       #address-cells = <0x2>;
       #size-cells = <0x2>;
       ranges;

       buffer@0 {
                no-map;
                reg = <0x8 0x0 0x0 0x80000000>;
       };

       ddr1_1: myddr@50000000000 {
               compatible = "shared-dma-pool";
               no-map;
               reg = <0x500 0x0 0x0 0x80000000>;
       };
};


amba_pl@0 {
       #address-cells = <0x2>;
       #size-cells = <0x2>;
       compatible = "simple-bus";
       ranges;

       vdu:vdu@a4000000 {
                clock-names = "s_axi_lite_aclk", "ref_clk", "m_axi_mcu_aclk", "m_axi_dec_aclk";
                clocks = <0x11 0x3 0x41 0x12 0x12>;
                compatible = "xlnx,vdu-1.0";
                reset-gpios = <0x13 0x0 0x1>;
                xlnx,core_clk = <0x320>;
                xlnx,enable_dpll;
                xlnx,mcu_clk = <0x23b>;
                xlnx,ref_clk = <0x64>;
       };

       al5d@a4020000 {
                al,devicename = "allegroDecodeIP0";
                compatible = "al,al5d";
                interrupt-names = "vdu_host_interrupt0";
                interrupt-parent = <0x5>;
                interrupts = <0x0 0x54 0x4>;
                reg = <0x0 0xa4020000 0x0 0x100000>;
                xlnx,vdu = <&vdu>;
      };

      al5d@a4120000 {
                al,devicename = "allegroDecodeIP1";
                compatible = "al,al5d";
                interrupt-names = "vdu_host_interrupt1";
                interrupt-parent = <0x5>;
                interrupts = <0x0 0x55 0x4>;
                reg = <0x0 0xa4120000 0x0 0x100000>;
                memory-region = <&ddr1_1>;
                xlnx,vdu = <&vdu>;
      };
};