VDU Interface Ports - 1.0 English

H.264/H.265 Video Decode Unit Solutions LogiCORE IP Product Guide (PG414)

Document ID
PG414
Release Date
2022-07-08
Version
1.0 English
Table 1. VDU Interfaces for Single Instance
Name Type Description
M_AXI_DEC0 Memory mapped AXI4 master interface 128-bit memory mapped interface for Decoder block.
M_AXI_DEC1 Memory mapped AXI4 master interface 128-bit memory mapped interface for Decoder block.
M_AXI_MCU Memory mapped AXI4 master interface 32-bit memory mapped interface for MCU.
S_AXI LITE Memory mappedAXI4-Lite slave interface AXI4-Lite memory mapped interface for external master access.
Table 2. VDU Interfaces for All Instances
Name Type Description
M_AXI_DEC0_0 Memory mapped AXI4 master interface 128-bit memory mapped interface for Decoder block.
M_AXI_DEC0_1 Memory mapped AXI4 master interface 128-bit memory mapped interface for Decoder block.
M_AXI_DEC1_0 Memory mapped AXI4 master interface 128-bit memory mapped interface for Decoder block.
M_AXI_DEC1_1 Memory mapped AXI4 master interface 128-bit memory mapped interface for Decoder block.
M_AXI_DEC2_0 Memory mapped AXI4 master interface 128-bit memory mapped interface for Decoder block.
M_AXI_DEC2_1 Memory mapped AXI4 master interface 128-bit memory mapped interface for Decoder block.
M_AXI_DEC3_0 Memory mapped AXI4 master interface 128-bit memory mapped interface for Decoder block.
M_AXI_DEC3_1 Memory mapped AXI4 master interface 128-bit memory mapped interface for Decoder block.
M_AXI_MCU Memory mapped AXI4 master interface 32-bit memory mapped interface for MCU.
S_AXI_LITE Memory mappedAXI4-Lite slave interface AXI4-Lite memory mapped interface for external master access.