Error Status Registers - 1.0 English

AXI Endpoint Protection Unit LogiCORE IP Product Guide (PG418)
Document ID
PG418
Release Date
2022-10-19
Version
1.0 English
Table 1. Error Status Registers
Address Name RW Reset Value Description
0x04 ERR_STATUS1_LO RO 0 LSBs of address of first blocked transaction
0x08 ERR_STATUS1_HI RO 0 MSBs of address of first blocked transaction
0x0C ERR_STATUS2 RO 0 SMID of first blocked transaction

The first transaction that is blocked for any reason is recorded. Any subsequent blocked transactions are not recorded until ISR is fully cleared (either by a register write or by a reset). ISR clear or reset will also reset all Error Status registers to zero, and the next blocked transaction after that will be recorded.