Manager Interface Signals - 1.0 English

AXI Endpoint Protection Unit LogiCORE IP Product Guide (PG418)

Document ID
PG418
Release Date
2022-10-19
Version
1.0 English
Table 1. M_AXI Interface Signals
Signal I/O Width Description
m_axi_awid O ID_WIDTH Write Address channel transaction ID
m_axi_awaddr O ADDR_WIDTH Write Address channel address
m_axi_awlen O 8 Write Address channel Burst Length code. (0–255)
m_axi_awsize O 3 Write Address channel Transfer Size code (0–7)
m_axi_awburst O 2 Write Address channel Burst Type (0–2)
m_axi_awlock O 1 Write Address channel Atomic Access Type (0, 1)
m_axi_awcache O 4 Write Address channel cache characteristics
m_axi_awprot O 3 Write Address channel protection bits
m_axi_awqos O 4 Write Address channel Quality of Service
m_axi_awuser O AWUSER_WIDTH User-defined AW channel signal
m_axi_awvalid O 1 Write Address channel valid
m_axi_awready I 1 Write Address channel ready
m_axi_awregion O 4 Write Address channel address region index
m_axi_wdata O DATA_WIDTH Write Data channel data
m_axi_wstrb O DATA_WIDTH/8 Write Data channel data byte strobes
m_axi_wlast O 1 Write Data channel last data beat
m_axi_wuser O WUSER_WIDTH User-defined W channel signals
m_axi_wvalid O 1 Write Data channel valid
m_axi_wready I 1 Write Data channel ready
m_axi_bid I ID_WIDTH Write Response channel transaction ID
m_axi_bresp I 2 Write Response channel response code (0–3)
m_axi_buser I BUSER_WIDTH User-defined B channel signals
m_axi_bvalid I 1 Write Response channel valid
m_axi_bready O 1 Write Response channel ready
m_axi_arid O ID_WIDTH Read Address channel ID
m_axi_araddr O ADDR_WIDTH Read Address channel address
m_axi_arlen O 8 Read Address channel Burst Length Code (0–255)
m_axi_arsize O 3 Read Address channel Transfer Size Code (0–7)
m_axi_arburst O 2 Read Address channel Burst Type (0–2)
m_axi_arlock O 1 Read Address channel Atomic Access Type (0,1)
m_axi_arcache O 4 Read Address channel cache characteristics
m_axi_arprot O 3 Read Address channel protection bits
m_axi_arqos O 4 Read Address channel Quality of Service
m_axi_aruser O ARUSER_WIDTH User-defined AR channel signals
m_axi_arvalid O 1 Read Address channel valid
m_axi_arready I 1 Read Address channel ready
m_axi_arregion O 4 Read Address channel address region index
m_axi_rid I ID_WIDTH Read Data channel transaction ID
m_axi_rdata I DATA_WIDTH Read Data channel data
m_axi_rresp I 2 Read Data channel response code (0–3)
m_axi_rlast I 1 Read Data channel last data beat
m_axi_ruser I RUSER_WIDTH User-defined R channel signals
m_axi_rvalid I 1 Read Data channel valid
m_axi_rready O 1 Read Data channel ready