AXI transactions from
VersalĀ®
ACAP hard AXI
managers contain an SMID. This is a 10-bit value sent on the AXI user signal. The
Versal architecture specification defines SMIDs
for every hardened managers. SMID is encoded in AWUSER[9:0]
and ARUSER[9:0]
of the
transaction. The mask is applied to both the transaction SMID and the register SMID
during a lookup.
A match occurs if both the following conditions are met:
- (transaction SMID) AND (register MASK) = (register SMID) AND (register MASK)
- (transaction is READ/WRITE) matches (register READ/WRITE access)
This match operation is performed on all implemented manager ID registers in parallel. If no register SMID matches, then the SMID check fails and the transaction is blocked. If any register SMID matches, then further checks are performed.