Vitis Integrated Design Environment
The Vitis™ integrated design environment (IDE) can be used to target system programming of Xilinx® devices including, Versal® devices with multiple AI Engine kernels. The following features are available in the tool.
- An optimizing C/C++ compiler that compiles the kernels and graph code making all of the necessary connections, placements, and checks to ensure proper functioning on the device.
- A cycle approximate simulator, accelerated functional simulator, and profiling tools.
- A debugging environment that works in both simulation and hardware environments.
Vitis Command Line Tools
Command line tools are available to build, simulate, and generate output files and reports. Command line outputs which are generated by the IDE are captured to facilitate subsequent integration into customer build environments. The Vitis Analyzer IDE is available for report viewing and analysis of the output files and reports generated by the command line tools.
Vitis Model Composer
Vitis™ Model Composer offers a high-level graphical entry environment based on MATLAB® and Simulink® for simulation and code generation of designs that includes AI Engine, HLS, and RTL components. For more information, see the Vitis Model Composer User Guide (UG1483).
- Import AI Engine kernels, graphs, HLS kernels, and RTL based blocks into one Simulink® design for fast co-simulation.
- From the Simulink library browser, drag and drop optimized AI Engine functions such as Finite Impulse Response (FIR) and FFT filters into the design.
- Verify the design using stimulus generated in MATLAB or Simulink, visualize the results, and compare the results with golden reference. Generate graph code and test vectors.
- Assemble imported and block library code to feed into downstream tools.