The 4-byte address commands supported by the legacy Quad-SPI controller are listed in Table: 4-byte Address Support. The legacy Quad-SPI controller supports the following 4-byte address commands. The number of data lanes (DQ pins) for sending the instruction, opcode, and data and receiving the data are listed in table. The legacy Quad-SPI controller does not support instructions where the flash device requires using a different number of data lanes for the same instruction code.
Table 24-7: 4-byte Address Support
Command Number
|
Instruction Code
|
Address Bytes
|
Opcode Lanes
|
Address Lanes
|
Data Lanes
|
Command Type
|
1
|
8'h13
|
4 bytes
|
1
|
1
|
1
|
4-byte address read. Single lane for opcode, address, and data.
|
2
|
8'h3C
|
4 bytes
|
1
|
1
|
2
|
4-byte address fast read, dual output. Single lane for opcode, address, and two lanes for data.
|
3
|
8'h6C
|
4 bytes
|
1
|
1
|
4
|
4-byte address fast read, quad output. Single lane for opcode, address, and four lanes for data.
|
4
|
8'hBC
|
4 bytes
|
1
|
2
|
2
|
4-byte address fast read, dual I/O. Two lanes for opcode, address, and two lanes for data.
|
5
|
8'hEC
|
4 bytes
|
1
|
4
|
4
|
4-byte address fast read, quad I/O. Single lane for opcode, four lanes for address and four lanes for data.
|
6
|
8'h0C
|
4 bytes
|
1
|
1
|
1
|
4-byte fast. Single lane for opcode, address, and data.
|