APU Perspective

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

From the software perspective, the least intrusive method of programming the I/O is to use a processor in the APU MPCore to move data between the PS and PL. As shown in This Figure, data is directly moved by the CPU, thus removing the need to handle events from a separate DMA. Access to the PL is provided through the two M_AXI_HPMx_FPD master ports, which target a memory address range in the PL. The PL design is also simplified because a single AXI slave can be implemented to service the CPU requests.

Some drawbacks of using a CPU to move data is that a valuable CPU is spending cycles performing simple data movement instead of complex control and computation tasks, and the available throughput is limited.

Figure 35-4:      RPU and APU Masters

X-Ref Target - Figure 35-4

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