ATB Timeout Description

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

There is an AXI timeout block in the interconnect to ensure that the interconnect does not hang because of a non-responding slave. This block keeps track of AXI transactions and times out when the slave does not respond within a specific time. It responds to the master with a response. This completes the AXI transaction and prevents the master from hanging forever while waiting for the response from the slave. This Figure describes the top-level architecture of the AXI timeout block.

Figure 15-2:      AXI Timeout Block Architecture

X-Ref Target - Figure 15-2

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The AXI timeout block instances in the interconnect are shown in Table: AXI Timeout Block Instances. These blocks in the LPD and FPD domains derive the timeout value from the ATB_PRESCALE register, which is present in the LPD_SLCR and FPDSLCR register sets, respectively.