AUX Write Transaction

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

An AUX write transaction (This Figure) is initiated by setting up the AUX_ADDRESS, and writing the data to the AUX_WRITE_FIFO followed by a write to the AUX_COMMAND register with the code 0x08. Writing the command register begins the AUX channel transaction. The host should wait until either a reply received event or reply time-out event is detected. These events are detected by reading INTERRUPT_STATUS registers (either in ISR or polling mode). When the reply is detected, the host should read the AUX_REPLY_CODE register and look for the code 0x00 indicating that the AUX channel has successfully acknowledged the transaction.

Figure 33-20:      AUX Write Transaction

X-Ref Target - Figure 33-20

X15510-aux-write-flow.jpg