AXI Port Interface

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

The AXI port interface (XPI) provides the interface to the application ports. It provides bus protocol handling, data buffering and reordering for read data, data bus size conversion (upsizing or downsizing), and memory burst address alignment.

The XPI interfaces the AXI application port to the DDR memory controller and performs the following main functions.

Read address generation.

Write address generation.

Write data generation.

Read data and response generation.

Write response generation.

The XPI converts AXI bursts into DRAM read and write requests that are forwarded to the port arbiter (PA). In the opposite direction, the XPI converts the responses from the DDRC into appropriate AXI responses. All AXI ports are configured synchronous to the memory controller clock.