Cluster Shutdown Mode with System Driven L2 Flush

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

The cluster shutdown mode is where the PDCORTEXA53, PDL2, and PDCPU power islands are shut down and all previous states are lost. To power down the cluster, apply the following sequence.

1.Ensure that all cores are in shutdown mode, see Individual MPCore Shutdown Mode.

2.The MPCore asserts the pl_acpinact signal to idle the ACP. This is necessary to prevent ACP transactions from allocating new entries in the L2 cache during the hardware cache flush. For more information about the pl_acpinact signal, see Answer Record 70383.

3.Assert L2FLUSHREQ High.

4.Hold L2FLUSHREQ High until L2FLUSHDONE is asserted.

5.Deassert L2FLUSHREQ.

6.Assert ACINACTM. Wait until the STANDBYWFIL2 output is asserted to indicate that the L2 cache memory is idle.

7.Activate the cluster output clamps.

8.Remove power from the PDCORTEXA53 and PDL2 power domains.

The Zynq UltraScale+ MPSoC provides the ability to power off each of the four APU processors independent of the other processors. Each processor power domain includes an associated Neon core. The control for the power gating is dynamic and is handled by the power management software running on the platform management unit (PMU).