DMA channel executes the DMA transactions by writing the source SGL and the destination SGL into the SRC/DST SGL queues and incrementing the SRC/DST_Q_LIMIT registers (This Figure).
Note: Queue management registers *_PTR_LO, *_PTR_HI, *_SIZE, and *_NEXT must not be written when the DMA channel is enabled. It is permissible to modify only the SRC/DST/STAS/STAD_Q_LIMIT queue registers, while the DMA channel is enabled. Increment these registers to provide additional elements for the DMA channel to execute.
IMPORTANT: The minimum queue size must be large enough to hold at least one full DMA transaction of maximum size. DMA completion status queues are only written when a source SGL element is completed that had its EOP flag == 1 (end of a DMA transaction). If the queue is too small to be able to place all of the SGL for a single DMA transaction in the queue, then the SGL with EOP == 1 is not added to the queue and the DMA operation will not complete. In such a case, the software is not able to free queue elements and no new SGL can be given to the DMA channel unless the queue elements are freed.
A queue size of N has N queue elements: ,,...,[N-1]. For example, a queue size of 2 has  and  elements.
The queue wraps at the N-1 element. For example, for a queue size of 2 the wrap occurs as: , , ,...
RECOMMENDED: The DMA queues are intended to be initially setup and reused for multiple DMA operations. The DMA queues are designed to enable highly overlapped transactions. Software can setup new DMA operations in the queue while the DMA channel is executing operations that the software placed in the queue earlier.
The DMA queues can also be setup for each DMA transaction, although this method provides lower performance because the queues must be reconfigured between DMA transactions. DMA queues can only be reconfigured when the DMA channel is disabled. The steps to setup the DMA queues are listed.
1.Wait for all outstanding DMA transactions for the channel to complete.
2.Disable the DMA channel.
3.Reconfigure the queues.
4.Re-enable the DMA channel.