Dedicated Device Pins

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

The dedicated device pins are divided into these groups:

Power.

Clock, reset, and configuration.

JTAG interfaces.

Multiplexed I/O (MIO).

PS GTR serial channels.

DDR I/O (see Table: DDR Pins in DDR PHY Features).