The following sequence describes register programming for initialization of the xHCI controller as a USB 2.0 device.
1.In register DCTL, set the CSftRst field to 1 and wait for a read to return 0. This resets the device.
2.In registers GSBUSCFG0/1, leave the default values if the correct power-on values were selected during coreConsultant configuration.
3.This step is only required to enable threshold. In register GTXTHRCFG/ GRXTHRCFG, leave the default values (if the correct power-on values were selected during coreConsultant configuration).
4.In register GSNPSID, the software must read the Synopsys ID register to find the device version and configure the driver for any version-specific features.
5.Optionally, in register GUID, the software can program the user ID GUID read/write register.
6.In register GUSB2PHYCFG, program the following PHY configuration fields: USBTrdTim, FSIntf, PHYIf, TOUTCal, or leave the default values (if the correct power-on values were selected during coreConsultant configuration).
IMPORTANT: The PHY must not be enabled for auto-resume in device mode. The field GUSB2PHYCFG (ULPIAutoRes) must be written with 0 during the power-on initialization in case the reset value is 1.
7.In register GUSB3PIPECTL, program the following PHY configuration fields: DatWidth, PrtOpDir, or leave the default values (if the correct power-on values were selected during coreConsultant configuration).
8.In register GTXFIFOSIZn, write these registers to allocate prefetch buffers for each TX endpoint. Unless the packet sizes of the endpoints are application specific, it is recommended to use the default value.
9.In register GRXFIFOSIZ0, write this register to allocate the receive buffer for all endpoints. Unless the packet sizes of the endpoints are application-specific, it is recommended to use the default value.
10.In registers GEVNTADRn/ GEVNTSIZn/ GEVNTCOUNTn, depending on the number of interrupts allocated, program the event buffer address and size registers to point to the event buffer locations in system memory, the sizes of the buffers, and unmask the interrupt.
IMPORTANT: USB operation stops if the event buffer memory is insufficient, because the block stops receiving/transmitting packets.
11.In register GCTL, program this register to override scaledown, RAM clock select, and clock gating parameters.
12.In register DCFG, program device speed and periodic frame interval.
13.In register DEVTEN, at a minimum, enable USB reset, connection done, and USB/link state change events.
14.In register DEPCMD0, issue a DEPSTARTCFG command with DEPCMD0.XferRscIdx set to 0 and CmdIOC set to 0 to initialize the transfer resource allocation. Poll CmdAct for completion.
15.In registers DEPCMD0/ DEPCMD1, issue a DEPCFG command for physical endpoints 0 and 1 with the following characteristics, and poll CmdAct for completions.
°USB endpoint number = 0 or 1 (for physical endpoint 0 or 1)
°FIFONum = 0
°XferNRdyEn and XferCmplEn = 1
°Maximum packet size = 512
°Burst size = 0
°EPType = 2’b00 (Control)
16.In registers DEPCMD0/ DEPCMD1, issue a DEPXFERCFG command for physical endpoints 0 and 1 with DEPCMDPAR0_0/1 set to 1, and poll CmdAct for completions.
17.In register DEPCMD0, prepare a buffer for a setup packet, initialize a setup TRB, and issue a DEPSTRTXFER command for physical endpoint 0, pointing to the setup TRB. Poll CmdAct for completion.
Note: The block attempts to fetch the setup TRB through the master interface after this command completes.
18.In register DALEPENA, enable physical endpoints 0 and 1 by writing 0x3 to this register.
19.In register DCTL, set DCTL.RunStop to 1 to allow the device to attach to the host. The device now is ready to receive start-of-file (SOF) packets, respond to control transfers on control endpoint 0, and generate events.