Egress Host Driver

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

1.Does the host driver require a PCIe device specific probe?

2.Enables bus mastering for the Endpoint and allocates the memory region to accept data from the Endpoint.

3.Conveys the physical address of the memory to the Endpoint through the scratchpad registers using doorbell interrupts.

4.Waits for a transfer completion signal from the Endpoint to consume data.