Erase Block

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English
Table 25-9:      Erase Block

Task

Register

Register Field

Register Offset

Bits

Value (Binary)

Enable transfer complete interrupt.

Interrupt_Status_Enable_Register

trans_comp_sts_en

0x014

2

1b'1

Program command for block erase (0xD060).

Command_Register

All

0x0C

31:0

Program 0xD060 with required DMA mode and address cycles.

Program column, page, and block address (next two steps).

Program memory address register 1.

Memory_Address_Register1

All

0x04

31:0

Program block address in bits 31:25.

Program page address in bits 22:16.

Program column address in bits 12:0.

Program memory address register 2.

Memory_Address_Register2

All

0x008

31:0

Write required values for memory address.

Select the device.

Memory_Address_Register2

Chip_Select

0x08

31:0

Targets chip select value.

Set block erase in program register.

Program_Register

Block_Erase

0x10

2

1b'1

Poll for transfer complete event.

Interrupt_Status_Register

trans_comp_reg

0x1C

2

Wait until transfer is completed or wait time is over.

Clear the transmit complete interrupt after transfer completed.

Interrupt_Status_Enable_Register

trans_comp_sts_en

0x014

2

1b'0

Clear the transmit complete flag after transfer completed.

Interrupt_Status_Register

trans_comp_reg

0x1C

2

1b'1