Example: PHY Initialization

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

1.Detect the PHY address. Read the PHY identifier fields in PHY registers 2 and 3 for all the PHY addresses ranging from 1 to 32. The register contents are valid for a valid PHY address.

2.Advertise the relevant speed/duplex settings. These bits can be set to suit the system. Refer to the PHY vendor data sheet for more information.

3.Configure the PHY as applicable. This could include options to set PHY mode, timing options in the PHY, or others as applicable to the system. Refer to the PHY vendor data sheet for more information.

4.Wait for completion of auto-negotiation. Read the PHY status register. Refer to the PHY vendor data sheet for more information.

5.Update the controller with auto-negotiated speed and duplex settings. Read the relevant PHY registers to determine the negotiated speed and duplex. Set the speed in gem.network_config[gigabit_mode_enable], gem.network_config[speed] bits, and the duplex in gem.network_config[full_duplex] bit.