Example – Single Pass Sequence Mode

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

In single pass sequence mode, the sequencer makes one pass through the sequencer channel select registers and then stops. All channels are available for single pass mode.

The following features are not applicable.

Low-rate sequencer

Measurement averaging

1.Put the SYSMON unit into its default sequence mode and enable the alarms. Write 0000h to the CONFIG_REG1 and CONFIG_REG3 registers.

2.PS SYSMON unit only. If the PS SYSMON unit is held in reset, deassert reset. This causes the unit to operate in its default sequence mode and allows the software to configure the sequence registers and perform calibration. The PS SYSMON unit reset is controlled by AMS.PS_SYSMON_CONTROL_STATUS [reset_user]. After reset is deasserted, wait until the AMS_CTRL.PS_SYSMON_CONTROL_STATUS [startup_done] bit is set. Software might begin the startup state machine again by writing a 1 to the self clearing [startup_trigger] bit and wait again for the [startup_done] bit.

3.Select the desired sensor channels. Write to the SEQ_CHANNEL registers.

4.PL SYSMON unit only. If any of the VP_VN, VAUX, or VUser channels are used, (i.e., VUser channels are internal), select the desired sampling circuit and acquisition length for each of these channels. Write to the appropriate SEQ_INPUT_MODE{0, 1} and SEQ_ACQ{0, 1} registers.

5.Change the sequence mode from default mode to single pass mode and keep the alarms enabled. Write 1000h to the CONFIG_REG1 register.

Read the measurement registers for the monitored channels. The EOS event indicates when the measurement registers have valid data. The “eos” bit in the ISR_1 register is the EOS for the PS SYSMON.