Example: Start-up Sequence

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

1.Configure clocks. Refer to the Clocks section.

2.Configure TX/RX signals. Refer to the MIO Programming section.

3.Wait for configuration mode. Read can.SR[CONFIG] until it equals 1.

4.Reset the controller. The controller comes up in configuration mode. Refer to the Resets section.

5.Program the bit-sampling clock. Refer to the RX/TX Bit Timing Logic section.

6.Program the interrupts, as needed. Refer to the Interrupts section.

7.Program the acceptance filters. Refer to the RX Message Filtering section.

8.Select operating mode. Normal, sleep, snoop, or loopback. Refer to the Change Operating Mode section.

9.Enable the controller. Write a 1 to can.SRR[CEN].