GTR Transceivers

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

The four GTR transceiver channels are shared with five high-speed serial I/O peripherals; four from the SIOU in the FPD and the USB 3.0 controller based in the LPD. The controllers support the following protocols.

PCI Express® integrated interface—PCIe base specification version 2.1.

SATA 3.1 specification interface.

DisplayPort interface—implements a DisplayPort source-only interface with video resolution up to 4k x 2k.

USB 3.0 interface—compliant to USB 3.0 specification implementing a 5 Gb/s line rate.

Serial GMII interface—supports a 1 Gb/s SGMII interface.

The PL includes three high-speed serial I/O peripherals. These interfaces are described in PL Peripherals.

PCI Express Integrated interface—PCIe base specification version 3.1 and 4.0.

100G Ethernet.

Interlaken.

This Figure contrasts the location and I/O connectivity of all the high-speed serial I/O peripherals.