Generic Quad-SPI Controller in PIO Mode

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

For PIO mode operation, follow these steps.

1.Select the generic Quad-SPI controller by writing a 1 to the generic_qspi_sel register bit.

2.Set the mode_en bits = 2'b00 of the GQSPI_CFG register.

3.Check to make sure that the generic FIFO is not full and then write the data into the generic FIFO using a read or write command request on the APB interface.

4.Write the TX data into the TXFIFO when there is a write transfer over the APB interface.

5.When there is a write request, the generic Quad-SPI controller sends the command, address, dummies from the generic FIFO and sends write data from the TXFIFO.

6.When there is a read request, the generic Quad-SPI controller sends the command, address, dummies from the generic FIFO and sends read data into the RXFIFO.

7.Read requests are issued from the APB interface to receive the RX data.

When two flash devices are connected in stacked mode, the generic Quad-SPI controller checks for the data bus select field of the generic FIFO and sends the requests accordingly.