I/O Buffer Output Enable Control

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

The output enable for each MIO I/O buffer is controlled by a combination of the setting of the three-state override control bit, the selected signal type (input-only or not), and the state of the peripheral controller. The three-state override bit can be controlled from either of two places: the iou_slcr.MIO_PIN_xx register bit or the iou_slcr.MIO_MST_TRIx register bits. These bits control the same flip-flop to help control the three-state signal of the I/O buffer. The I/O buffer output is enabled when the three-state override control bit equals 0 and either the signal is an output-only or the I/O peripheral is driving a signal that is configured as I/O.