I2C Master Mode

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

The master is always the device that drives the SCL clock signal. The slaves are the devices that respond to the master. There can be multiple slaves on the I2C bus however, there is normally only one master. It is possible to have multiple masters. To select master mode, set Control [MS] bit = 1.