Input Mode

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

In input mode, the pin values are passed through to the corresponding register location after meta-stability protection (GPIO inputs are considered asynchronous). The pin values are available through two different paths. There is a dedicated path as well as a path through the register. In the latter case, the direction control must be set to 0 for the input from the I/O pad to be passed through to the register. There are two APB address locations allocated to the pin: A read only location for the dedicated path and a read/write location for the registered path. The pin value can be read from either location in the input mode. The two paths produce different values in the output mode with inactive output enable.