Interconnect Submodules

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

The interconnect has following sub-modules.

Xilinx memory protection unit (XMPU): FPD, OCM, and DDR.

Xilinx peripheral protection unit (XPPU).

System memory management unit (SMMU).

AXI timeout block (ATB) that works as a watchdog timer for interconnect hang.

AXI and APB isolation block (AIB) units that are responsible for functionally isolating the AXI/APB master from the slave in preparation for powering down an AXI/APB master or slave.

PS-PL AXI interfaces.

AXI performance monitor.