Interfaces and Signals

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2023-12-21
Revision
2.4 English

This RTC interfaces to logic in the LPD and includes the following features.

An APB interface to access the registers within the controller and the RTC counters. This interface is clocked by the LPD_LSBUS_CLK.

Alarm logic including the alarm register to save the alarm time (in seconds).

Interrupt status, interrupt mask, interrupt enable, and interrupt disable registers to manage the seconds and alarm interrupts.

The RTC control register enables the crystal oscillator, controls power to the RTC, and enables address errors when accesses are made to the regions within the RTC address space that are not mapped to any registers.

 

IMPORTANT:   The control register must be programmed every time the LPD is powered on. Otherwise, the value returned by reading the control register can be different from the actual control settings stored in the BPD.

The SET_TIME_WRITE, CALIB_WRITE, and CURRENT_TIME registers are all implemented within the battery-powered RTC but accessed via the APB interface in the LPD.

The controller logic also includes the ALARM alarm register and alarm generation logic. Whenever the value of the seconds counter in the RTC matches the value that is explicitly loaded into the alarm register, and the alarm interrupt is enabled, the RTC_Alarm system interrupt is generated.

The RTC control registers are programmed via the APB interface in the LPD and retained in the battery-powered domain because it is required for RTC operation. The register set controls functions and is used when performing calibration functions.