Interrupt Control Registers

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

The SYSMON interrupt controller processes PS and PL alarms, end-of-process events, and register address decode errors.

Each SYSMON unit has configuration registers to disable alarms. If an alarm is disabled when its event occurs, the alarm signal does not assert. The interrupt controllers (AMS registers and PL signals) will not receive an IRQ. Each alarm can be disabled using a configuration register; a disabled alarm is ignored by the system.