Interrupt Injection Mechanism

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

The RPU implements an interrupt injection function to inject interrupts into the generic interrupt controller’s shared peripheral interrupts (SPI). The RPU GIC has 160 SPIs. Software can inject an interrupt on each of 160 interrupt lines using this mechanism. The 160 SPIs are divided into five, 32-bit APB registers. The RPU implements an interrupt register and an interrupt mask register. The logic in This Figure is replicated on each interrupt going to the SPI of the RPU’s GIC. If the interrupt mask corresponding to the interrupt is set in the RPU_INTR_MASK register, the RPU passes the APB register version of the interrupt to the GIC.

Figure 4-3:      RPU Interrupt Injection

X-Ref Target - Figure 4-3

X17684-rpu-interrupt-injection-block.jpg

Table: SPI Map to RPU Interrupt and RPU Interrupt Mask Registers lists the mapping of the SPI bits.

Table 4-2:      SPI Map to RPU Interrupt and RPU Interrupt Mask Registers

SPI

RPU Interrupt Register

RPU Interrupt Mask Register

SPI<31:0>

RPU_INTR_0<31:0>

RPU_INTR_MASK_0<31:0>

SPI<63:32>

RPU_INTR_1<31:0>

RPU_INTR_MASK_1<31:0>

SPI<95:64>

RPU_INTR_2<31:0>

RPU_INTR_MASK_2<31:0>

SPI<127:96>

RPU_INTR_3<31:0>

RPU_INTR_MASK_3<31:0>

SPI<159:128>

RPU_INTR_4<31:0>

RPU_INTR_MASK_4<31:0>