LDPC Decoding/Encoding

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2023-12-21
Revision
2.4 English

Highly configurable codes.

°A range of quasi-cyclic codes can be configured over an AXI4-Lite interface

°Code parameter memory can be shared across up to 128 codes

°Codes can be selected on a block-by-block basis

°Encoder can re-use suitable decoder codes

Normalized min-sum decoding algorithm

°Normalization factor programmable (from 0.0625 to 1 in steps of 0.0625) for layers

Number of iterations between 1 and 63

°Specified for each codeword

Early termination

°Specified for each codeword to be none, one, or both of the following:

-Parity check passes

-No change in hard information or parity bits since last iteration

Soft or hard outputs

°Specified for each codeword to include information and optional parity

°6-bit soft log likelihood ratio (LLR) input and 8-bit output (8-bit interface, 2 fractional bits, with external saturation before input to symmetric range –7.75 to +7.75)

In- or out-of-order execution of blocks, with user specified ID field to identify blocks