Linear Address Mode

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

The linear address mode uses a subset of device operations to eliminate the software overhead to read the flash memory. Linear address mode issues commands to the flash memory and controls the flow of data from the flash memory bus to the AXI interface. The controller responds to memory requests on the AXI interface as if the flash memory were a ROM memory.