Link Layer

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

The function of the SATA link layer is to interface between the transport and PHY control layers in the transmission and reception of frames and primitives. The link layer utilizes the two unidirectional links provided by the SATA interface to maintain coordinated communication between the host and the device. Payload data can only be transmitted in one direction at a time.

The link layer can work at SATA generation 1 (1.5 Gb/s), generation 2 (3.0 Gb/s) and generation 3 (6.0 Gb/s) speeds. For 1.5 Gb/s operation it must be clocked with a 37.5 MHz clock derived from the receive side of the SATA PHY, for 3.0 Gb/s operation it is clocked with a similarly derived 75 MHz clock and for 6.0 Gb/s operation, this becomes 150 MHz.

The data flow for the transmit side is shown in This Figure. The data flow for the receive side is shown in This Figure.

Figure 32-3:      Transmit Side Data Flow

X-Ref Target - Figure 32-3

X17811-datalink-transmit.jpg
Figure 32-4:      Receive Side Data Flow

X-Ref Target - Figure 32-4

X17812-datalink-receive.jpg

The link layer also partakes in flow control between the local and remote ends. The layer supports flow control actions based on the local FIFO status (which is located in the transport layer), or in response to receiving flow control messages from the remote end.

The transmit side of the link layer is also responsible for inserting a pair of ALIGN primitives every 254 double words, or more frequently as you can program the frequency.