The Wait for Interrupt (WFI) feature of the Arm v8-A architecture puts the processor in a low-power state by disabling most of the clocks in the MPCore while keeping the MPCore powered up. Apart from the small dynamic power overhead on the logic used to enable the MPCore to wake up from a WFI low-power state, the power draw is reduced to only include the static leakage current variable. Software indicates that the MPCore can enter the WFI low-power state by executing the WFI instruction.
When the MPCore is executing the WFI instruction, the MPCore waits for all instructions in the MPCore to retire before entering the idle or low-power state. The WFI instruction ensures that all explicit memory accesses that occurred before the WFI instruction in the order of the program are retired. For example, the WFI instruction ensures that the following instructions receive the required data or responses from the L2 memory system.
•Cache and TLB maintenance operations
•Store exclusive instructions
In addition, the WFI instruction ensures that stored instructions update the cache or are issued to the SCU.