The OCM implementation register is provided in Table: OCM Register Overview. Further details are in the Zynq UltraScale+ MPSoC Register Reference (UG1087) [Ref 4].
Table 18-2: OCM Register Overview
Type
|
Register Name
|
Description
|
Error control
|
OCM_ERR_CTRL
|
Enable/disable a error response.
|
OCM_ECC_CTRL
|
Enable/disable ECC. Detect only capability can be enabled only when ECC is enabled.
|
Interrupt
|
OCM_ISR OCM_IMR OCM_IEN OCM_IDS
|
Interrupt control and status registers.
|
Correctable error registers
|
OCM_CE_FFA OCM_CE_FFD0 OCM_CE_FFD1 OCM_CE_FFD2 OCM_CE_FFD3 OCM_CE_FFE
|
Correctable error-related information pertaining to various data banks can be found in these registers.
|
Uncorrectable error registers
|
OCM_UE_FFA OCM_UE_FFD0 OCM_UE_FFD1 OCM_UE_FFD2 OCM_UE_FFD3 OCM_UE_FFE
|
Uncorrectable error-related information pertaining to various data banks can be found in these registers.
|
Fault injection
|
OCM_FI_D0 OCM_FI_D1 OCM_FI_D2 OCM_FI_D3 OCM_FI_SY OCM_FI_CNTR
|
Fault injection data registers are used to inject faults in any of the 64 Kb data banks.
|
Information
|
OCM_IMP
|
Provides information regarding the amount of OCM memory currently implemented on the device.
|
Miscellaneous
|
OCM_CLR_EXE
|
Clear exclusive access monitors.
|
OCM_RMW_UE_FFA
|
Read-modify-write uncorrectable error log.
|
OCM_SAFETY_CHK
|
Safety endpoint connectivity check register.
|
OCM_PRDY_DBG
|
Debug register.
|