PL Reset

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

The Zynq UltraScale+ MPSoC has general-purpose output pins connected to the PMU block that can be used to reset blocks in the PL. Refer to Platform Management Unit for more details.