PMU Clocking

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

The PMU operates on the SysOsc clock (180 MHz ± 15%) that is supplied from the internal ring-oscillator (IRO) located within the system monitor (PS SYSMON) block. The clock is gated until the POR block detects that the VCC_PSAUX supply has ramped up.

SysOsc starts to oscillate as soon as the voltage is high enough for the block to function. The reset of the PMU processor is synchronous and requires a clock edge for it to take place, POR_B input must be asserted until the voltage has ramped up. This guarantees that the PMU processor GPOs, which control many hardware logic blocks within the PS, are initialized when the device is powered up.