Registers are used to control and set the status of the MBIST memory controllers via the PMU global register set. This register set can be protected by a 64 KB aperture of the Xilinx peripheral protection unit (XPPU). There are five control and status registers:
•MBIST_RST controls the reset signal (rw)
•MBIST_PG_EN controls the PG_EN signal (rw)
•MBIST_SETUP controls the SETUP signal (rw)
•MBIST_DONE indicates when the test is completed (ro)
•MBIST_GOOD indicates the results of the test (ro)
To initiate an MBIST operation, set the bit in all three trigger registers: MBIST_RST, MBIST_PG_EN, and MBIST_SETUP. When the operation is finished, the software clears the associated bits in all three trigger registers. The MBIST_DONE bit goes High when the operation is finished. MBIST_GOOD provides the status of the operation: 0 (failure) or 1 (success). MBIST_DONE and MBIST_GOOD are read-only registers and cleared by the hardware when the trigger registers are cleared.
Table: MBIST Control Register Bit Fields lists the system elements that are tested by the MBIST and the bit assignments for the control and status registers.