Power Down

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

Any master in the system can request the PMU to power down an island or domain by writing a 1 to the appropriate bits in the REQ_PWRDWN_TRIG register while the corresponding mask bit is also enabled in the REQ_PWRDWN_INT_MASK register. The PMU will be interrupted and after executing the preamble ISR to check the interrupt pending register within the I/O block, it will execute the power-down-request ISR. In the case of a simultaneous power down request, the order for processing power-down requests is that the islands are powered down before the domains. The PMU will proceed to power down an island only if there is no other request from a master to power it up.