Power Down Procedure

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

The power down is initiated by the Cortex-R5F MPCore. As the TCM is placed in retention, the Cortex-R5F MPCore is required to do the following (This Figure).

1.Set the TCM bit in the RAM_RET_CNTRL register.

2.Set the TCM bit in the REQ_PWRDWN_TRIG register while the interrupt is masked for the TCM in the REQ_PWRDWN_INT_MASK register.

3.Set the RPU and TCM bits in the REQ_PWRUP_TRIG register while the interrupt mask bits for those fields are disabled.

4.Set the RPU bit in the REQ_SWRST_TRIG while the interrupt mask bit for it is disabled.

5.Set the alarm.

6.Disable interrupts.

7.Set the SLCR bit to request for a direct RPU power down and execute a WFI instruction.

This procedure causes an interrupt to the PMU to power down the RPU.

Figure 6-4:      Deep Sleep Power Down Flowchart

X-Ref Target - Figure 6-4

X15309-deep-sleep-power-down-flowchart.jpg