Processor-only Accessible Registers

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

There are several register sets that are only accessible to a processor (e.g., PMU, CSU, RPU, and APU):

PMU address map (PMU_LOCAL_REG, PMU_IOMODULE, PMU_LMB_BRAM).

CSU address map.

RPU address map (RPU GIC registers).

APU address map (PPI interrupts).