Programming Considerations

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

Note:   The DisplayPort controller can sometimes report underflow and overflow status for the same frame. This scenario can occur when the DDR memory responds to a requested burst slowly. Both underflow and overflow flags can be set in the dp.DP_INT_STATUS register.