Programming Example – Assign MIO Pin to CAN TX Output

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

This example assigns MIO pin 47 to the CAN TX controller signal. These steps refer to the IOU_SLCR register set.

1.Route the reference clock. Write 32h'0000_1220 to the MIO_PIN_47 register.

2.Enable output driver. Write a 0 to the MIO_MST_TRI1 [PIN_47_TRI] bit.

3.Select slow slew rate output. Write 1 to the BANK1_CTRL6 [22] bit.

4.Choose an output drive strength. Write to the BANK1_CTRL0 [22] and BANK1_CTRL1 [22] bits.

The I/O buffer input control, [schmit_cmos_n], does not need programming, but it is recommended to select CMOS. The voltage applied to PSIO bank 1 can be read using the BANK1_STATUS [0] bit.