Read Eye Centering

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

The read eye centering algorithm is performed in parallel for all byte lanes and requires write and read access to memory. The goal of the PHY read eye centering algorithm is to center the strobe within the data eye in each byte in the read path. An initial pattern is written into memory, read back, and then evaluated. Then read DQS/DQS# is moved to find the left and right edges of the read eye, and the optimal position is calculated. After centering, another read is executed to confirm data integrity.

Read eye centering completion is signaled by the PGSR0.REDONE bit. The high-level error flag is PGSR0.REERR. Additional debugging information is listed in Table: DATX8 General Status Register 2 (DXnGSR2) and Table: DATX8 General Status Register 2 (DXnGSR2).

Table 17-24:      DATX8 General Status Register 2 (DXnGSR2)

Register

Bits

Name

Description

Address

DX0GSR2

[4]

REERR

Read eye centering error: if set, indicates that the DATX8 has encountered an error during execution of the read eye centering training of byte 0.

FD0807E8

DX1GSR2

[4]

REERR

Same as above, for byte 1.

FD0808E8

DX2GSR2

[4]

REERR

Same as above, for byte 2.

FD0809E8

DX3GSR2

[4]

REERR

Same as above, for byte 3.

FD080AE8

DX4GSR2

[4]

REERR

Same as above, for byte 4.

FD080BE8

DX5GSR2

[4]

REERR

Same as above, for byte 5.

FD080CE8

DX6GSR2

[4]

REERR

Same as above, for byte 6.

FD080DE8

DX7GSR2

[4]

REERR

Same as above, for byte 7.

FD080EE8

DX8GSR2

[4]

REERR

Same as above, for byte 8.

FD080FE8

DX0GSR2

[5]

REWN

Read eye centering warning: if set, indicates that the DATX8 has encountered a warning during execution of the read eye centering training of byte 0.

FD0807E8

DX1GSR2

[5]

REWN

Same as above, for byte 1.

FD0808E8

DX2GSR2

[5]

REWN

Same as above, for byte 2.

FD0809E8

DX3GSR2

[5]

REWN

Same as above, for byte 3.

FD080AE8

DX4GSR2

[5]

REWN

Same as above, for byte 4.

FD080BE8

DX5GSR2

[5]

REWN

Same as above, for byte 5.

FD080CE8

DX6GSR2

[5]

REWN

Same as above, for byte 6.

FD080DE8

DX7GSR2

[5]

REWN

Same as above, for byte 7.

FD080EE8

DX8GSR2

[5]

REWN

Same as above, for byte 8.

FD080FE8

DX0GSR2

[11:8]

ESTAT

Error status: If an error occurred for byte 0 as indicated by REERR, the error status code can provide additional information regarding when the error occurred during the algorithm execution.

FD0807E8

DX1GSR2

[11:8]

ESTAT

Same as above, for byte 1.

FD0808E8

DX2GSR2

[11:8]

ESTAT

Same as above, for byte 2.

FD0809E8

DX3GSR2

[11:8]

ESTAT

Same as above, for byte 3.

FD080AE8

DX4GSR2

[11:8]

ESTAT

Same as above, for byte 4.

FD080BE8

DX5GSR2

[11:8]

ESTAT

Same as above, for byte 5.

FD080CE8

DX6GSR2

[11:8]

ESTAT

Same as above, for byte 6.

FD080DE8

DX7GSR2

[11:8]

ESTAT

Same as above, for byte 7.

FD080EE8

DX8GSR2

[11:8]

ESTAT

Same as above, for byte 8.

FD080FE8

Table 17-25:      Read Eye Centering Error Indications

PGSR0.REERR

DXnGSR2.REERR

DXnGSR2.ESTAT

PGSR0.
REDONE

Error Condition

1

1

0000

1

Initial read data miscompare before centering.

1

1

0101

1

Read data miscompare after read eye centering.

The results of the read eye centering can be viewed in the DXnLCDLR3 and DXnLCDLR4 registers, as listed in Table: Read Eye Centering Results Registers.

Table 17-26:      Read Eye Centering Results Registers

Register

Bits

Name

Description

Address

DXnLCDLR3

[8:0]

RDQSD

Read DQS delay: delay select for the read DQS (RDAS) LCDL for each byte.

FD08078C, FD08088C, FD08098C, FD080A8C, FD080B8C, FD080C8C, FD080D8C, FD080E8C, FD080F8C

DXnLCDLR4

[8:0]

RDQSND

Read DQSN delay: delay select for the read DQSN (RDQSN) LCDL for each byte.

FD080790, FD080890, FD080990, FD080A90, FD080B90, FD080C90, FD080D90, FD080E90, FD080F90