Receive Path

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

This Figure shows a block diagram of the receive path.

Figure 29-3:      PCS Receive Path

X-Ref Target - Figure 29-3

X15467-pcs-rx-block.jpg

The PCS receive block has the following features.

Symbol (comma) alignment for USB3.0 and PCIe v2.0 only. For other protocols, symbol alignment happens in the MAC IP.

Elasticity buffer management.

8B/10B decoder for USB3.0 and PCIe v2.0. Other protocols contain the decoder in the MAC IP.

Receive power state FSM.

LFPS/beacon detector (USB 3.0 and PCIe v2.0).