SATA Clock Programming

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English
Table 32-4:      Program SATA Clock

Task

CRF_APB
Register Set

Bit Field

Register Offset

Bits

Value

Program for 250 MHz IOPLL source

SATA_REF_CTRL

[CLKACT], [DIVISOR0], [SRCSEL]

0xA0

24 | 13:8 | 2:0

0x010200